Phase Aligner

Instance: i_phase_detector_unit_1, file: phase_detector_unit.vhd

The phase_detector_unit instance is needed to have a very well defined phase relationship between the recovered clock and the incoming data stream. Moreover, since the frequency detector is not able to perfectly match the NCO clock with the data rate, the recovered clock will never stop drifting. This dynamic phase adjustment fixes this issue.

The phase_detector_unit module consists of three parts. Since these are very similar to the “Phase Shift Filter” components, no block diagrams are shown. Please refer to that chapter to easily understand the VHDL code. The differences will be listed in the following.

• i_phase_detector_1 is an Alexander-type Bang-Bang phase dector
• i_phase_shift_filter is very similar to the phase_shift_filter_slave component. The difference is that here there is no master, as we don’t need to compare two different phase detection streams. The filtering window is therefore generated directly inside the module, using the bit_num_trans_time generic for lenght definition.
• i_ps_controller_1 is an MMCM dynamic phase adjustment signal controller. Since the “Phase Detector” has to communicate with the MMCME_2_ADV tile, the phase_up and phase_down flags generated by the i_phase_shift_filter intance must comply with the MMCM phase adjustment protocol. This is what the ps_controller achieves.